InnoRoutes R&D team gave a presentation on his team's newly published research paper on Architecture of a Synchronized Low-Latency Network Node Targeted to Research and Education at the 2017 IEEE 18th International Conference on High Performance Switching and Routing in Campinas, Brasil.
As line speeds are sufficient for most applications, reduction of latency and jitter are gaining in importance. InnoRoute introduces and discusses the architecture of a novel networking device that provides low-latency switching and routing. It integrates an up-to-date FPGA with a standard x86-64 processor and targets Time-Sensitive Networking (TSN) and machine-to-machine communication (M2M). First results show a cut-through latency of 2 – 2.5 μs for its 12 Gigabit Ethernet ports and full line rate packet processing. It features frequency synchronization across networks and is easily extendable, enabling researchers to build experiments in areas like industrial, automotive, and 5G mobile access networks, with the highest precision, repeatability, and ease.
You can access the presented slides here: HPSR2017-TN-presentation
The corresponding platform designed for this is the InnoRoute TrustNode, a robust, ready-to-use network processing platform designed for research and teaching purposes.
Find out more about our turnkey solution here: TrustNode Research Edition
Our mission is improving network efficiency. We are a Munich-based, leading edge engineering company focused on software defined networking. We are a highly specialized team with a focus on hardware design, offering turnkey solutions for research institutes and universities. InnoRoute is a certified partner in EU, German, and Bavarian funding projects like Charisma and SelfNet. InnoRoute was awarded the seal of excellence of the European Union and received an EU Innovation Award for its SME Instruments project „TrustNode“.
See more about the conference at HPSR2017